Google Unveils Eighth-Generation Tensor Processing Units
At the Google Cloud Next event on April 22, 2026, the tech giant revealed a pivotal shift in its approach to artificial intelligence hardware.
Instead of pursuing a singular, universal AI chip, Google has introduced its eighth-generation Tensor Processing Units (TPUs) as dual entities: the TPU 8t, designed for extensive pre-training, and the TPU 8i, optimized for memory-intensive inference and complex reasoning tasks.
This bifurcation signifies the inaugural occasion in which Google has delineated a TPU generation into specifically tailored architectures.
The timing of this unveiling is particularly poignant, aligning with what Google describes as the “agentic era” of AI.
In this context, AI systems evolve beyond merely addressing isolated prompts; they adeptly manage multiple tasks concurrently, necessitating distinct hardware attributes compared to the training of models.
Distinct Chips for Unique Functions
To grasp the nuances of these new designs, a brief examination of terminology is warranted. Training refers to the phase during which a model assimilates knowledge from vast datasets, a practice that demands sheer computational power at an unparalleled scale.
In contrast, inference is the utilization of the final model to respond to queries, favoring memory capacity, rapidity, and cost-effectiveness due to its continuous nature.
Positioned as a robust powerhouse, the TPU 8t boasts the capability to scale into superpods comprising up to 9,600 chips, achieving an impressive 121 ExaFLOPs utilizing FP4 technology.
On an individual chip basis, the TPU 8t delivers 12.6 FP4 PFLOPs and is equipped with 216 GB of High Bandwidth Memory (HBM) complemented by 128 MB of Static Random-Access Memory (SRAM).
The TPU 8i, conversely, features 288 GB of HBM and 384 MB of SRAM—an increase of threefold compared to its predecessor.
Each TPU 8i chip achieves a compute performance of 10.1 FP4 PFLOPs, with Google’s claims indicating an impressive efficiency improvement of up to 80% in performance-per-dollar compared to the Ironwood generation.
Technological Innovations Within the Chips
Both the TPU 8t and TPU 8i are fabricated using TSMC’s N3 process technology and incorporate Google’s proprietary Arm-based Axion CPUs. They are integral components of Google’s expansive AI Hypercomputer architecture.
Adding to its unique specifications, the TPU 8i employs an innovative Boardfly topology, which defines the inter-chip communication structure, alongside a CAE engine purportedly enhancing performance metrics.
On the software front, Google is accentuating a more cohesive integration between the hardware and associated tools through advanced frameworks like JAX and Pathways.
This eighth generation follows in the footsteps of Ironwood, the previous seventh-generation TPU launched in 2025.
Google anticipates general availability of the new chips by late 2026 and is set to disclose further technical insights at the Hot Chips 2026 conference in August.
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