YuzukiHD has unveiled its latest open-source hardware project: the YuzukiNeko, an innovative single board computer (SBC) comparable in size to the Raspberry Pi Pico, powered by the newly developed Allwinner F101 RISC-V system-on-chip (SoC).
The Allwinner F101 boasts a single core C907 RISC-V processor operating at 1.008 GHz, which is complemented by options of either 8MB or 16MB of PSRAM.
It supports a multitude of display interfaces, including MIPI DSI, 24-bit RGB, and LVDS. The YuzukiNeko board integrates the F101 SoC along with SPI NOR flash memory, a microSD card slot for additional storage, a USB-C interface, and dual 20-pin GPIO headers.
Specifications of YuzukiNeko:
- SoC – Allwinner F101
- CPU – T-head C907 RISC-V core up to 1.008 GHz
- Memory – Options of 8MB or 16MB PSRAM running at 252 MHz
- Package – QFN-68
- Storage
- 128 Mbit NOR flash (PY25Q128HA-SUH-IT)
- MicroSD card slot
- USB – USB Type-C for data transfer, power, and programming
- Expansion
- Two 20-pin headers featuring GPIOs, ADC, 5V, 3.3V, and GND
- Five pads with analog speaker output and additional GPIOs
- Miscellaneous – FEL button and power LED
- Power Supply – 5V via USB-C
- Dimensions – Approximately 51 x 21 mm
The comprehensive hardware resources, including PDF schematics, EasyEDA PCB layout, Gerber files, 3D STEP file, and Bill of Materials (BoM), can be accessed on GitHub.
The Linux source code, based on the mainline (Linux 7.2), along with Buildroot, is available in distinct repositories. Moreover, the board and Allwinner F101 processor are compatible with Zephyr RTOS.
Further insights into the Allwinner F101 “Smart Control and Display Processor” can be gleaned from the product brief available on the Whycan website, offering additional technical details, including a block diagram.
Allwinner F101 specifications:
- CPU – T-Head XuanTie C907 RISC-V CPU @ 1.008 GHz, featuring a 32 KB I-cache and 16 KB D-cache
- Display Engine
- Allwinner Awonder1.1 Lite post-processing capabilities
- De-interlacing (DI) up to 720p @ 60fps
- G2D hardware accelerator with rotation and mixing functions
- Video Engine
- Image decoding
- JPEG up to a resolution of 16384×16384
- PNG up to 2048×2048
- Video encoding
- JPEG/MJPEG up to 720p @ 30fps
- Maximum resolution: 8192×8192
- Image decoding
- Memory
- F101S2-XXX – 8MB 16-bit PSRAM (SiP)
- F101S3-XXX – 16MB 16-bit PSRAM (SiP)
- Storage – SPI flash interface
- Video Output
- RGB888 up to 1280×720 @ 60fps
- Single-link LVDS up to 1366×768 @ 60fps
- 4-lane MIPI DSI up to 1280×800 @ 60fps
- Audio
- Digital-to-Analog Converter (DAC)
- Analog audio output – HPOUT
- Digital audio options – I2S/PCM, OWA OUT
- USB – USB 2.0 Dual Role Device (DRD)
- Other Peripherals
- SDIO2.0/3.0
- Two SPI interfaces, six UARTs, three TWI (I2C) interfaces
- Four-channel PWM, two PWM_BL, IR_RX
- One-channel GPADC, four-channel TPADC
- Security – Integrated 512-bit eFuse storage
- Package – QFN68, 7 x 7mm
Typical application diagram
While the YuzukiNeko is not yet available for purchase, it is anticipated to be launched soon. Previous open-source hardware endeavors from YuzukiHD, including the Avaota A1 and Yuzuki Chameleon, have successfully reached online retail.
A comment within a Whycan forum thread notes that the Allwinner F101 is priced at 18 yuan, approximately $2.70 USD. This suggests that the YuzukiNeko or comparable designs could possibly retail for under $10.
Appreciation is extended to Freire for the tip.
Jean-Luc commenced CNX Software in 2010 as a part-time initiative before transitioning to full-time daily news and reviews in 2011 after resigning from his position as a software engineering manager.
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